Monthly Archives: November 2015

Parallel Resonant Circuit

A parallel resonant RLC circuit is shown in Figure 1. The input admittance of a parallel R-L-C circuit is given by, (1)   By definition, at resonant frequnecy inductive and capacitive susceptances are equal in magnitude and opposite in phase. Therefore they cancel each other. (2)   Quality factor(Q) of […]

References – Phase Locked Loops

Phase-Locked Loops for High-Frequency Receivers and Transmitters, Mike Curtin &; Paul O’Brien, Analog Devices Part-1 |┬áPart-2 |┬áPart-3 Practical Tips for Phase Locked Loop Design, Dennis Fischette Fractional/Integer-N PLL Basics, Curtis Barrett, Texas Intruments PLL Performance, Simulation and Design Handbook 4th Edition Dean Banerjee, Natioanal Semiconductor A Fully Integrated Fractional-N Frequency […]

Cadence lock files 2 comments

If cadence is not properly exited or crashed, it results in edit locks on cadence files that were open at the time of exiting. These lock files have extension ‘.cdslck’. After restarting cadence, we have to remove edit locks to continue editing on those files. We have two options to […]