| Phase-Locked Loops for High-Frequency Receivers and Transmitters, Mike Curtin &; Paul O’Brien, Analog Devices Part-1 | Part-2 | Part-3 |
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Practical Tips for Phase Locked Loop Design, Dennis Fischette
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| Fractional/Integer-N PLL Basics, Curtis Barrett, Texas Intruments |
| PLL Performance, Simulation and Design Handbook 4th Edition Dean Banerjee, Natioanal Semiconductor |
| A Fully Integrated Fractional-N Frequency Synthesizer for Wireless Communications, Han-Woong Son, Georgia Institute of Technology |
| Design of Monolithic Phase-Locked Loops and Clock Recovery Circuits – A Tutorial, B. Razavi, IEEE Press, 1996 |
| High Speed Communication Circuits, MIT OpenCourseware Lec-21 | Lec-22 | Lec-23 |
Frequency Dividers |
| Superharmonic injection locked frequency dividers, H. Rategh and T. Lee, IEEE J. Solid-State Circuits, vol. 34, pp. 813–821, June 1998. |
| A CMOS frequency synthesizer with an injection-locked frequency divider for a 5 GHz Wire LAN receiver, H. Rategh, H. Samavati, and T. Lee, IEEE J. Solid-State Circuits, vol. 35, pp. 779–786, May 2000 |
| A Fully Integrated CMOS DCS-1800 Frequency Synthesizer, Craninckx, IEEE Jr. Solid-State Circuits, Vol.33, pp. 2054-2065, December 1998 |
| A Design Methodology for MOS Current-Mode Logic Frequency Dividers, Roberto Nonis, Enzo Palumbo, Pierpaolo Palestri, Luca Selmi, IEEE Tran. on Circuits and Systems, Vol.54, pp. 245-254, February 2007 |
Phase Noise |
| Oscillator Phase Noise: A Tutorial, Hajimiri &; Thomas H. Lee, IEEE Journal of Solid-State Circuits, vol. 35, pp. 326-336, March 2000 |
| A Study of Phase Noise in CMOS Oscillators., B. Razavi, IEEE Journal of Solid-State Circuits, vol. 31, pp. 331-343, March 1996 |
| Phase Noise – Basic Principles, Kevin Aylward Invalidity of The LTV Model For Real Circuits (Interesing, worth taking a look) |
| Transistor LC Oscillators for Wireless Applications: Theory and Design Aspects, Grebennikov Part-1 | Part-2 | Part-3 |